Physical modules

The CPU has a modular design: its implementation is spread out over a number of individual plug-in modules on an interconnecting baseboard.

The main reason for this is to allow for individual modules to be examined (e.g. on a breadboard), tested, and even re-implemented, as long as their electrical behaviour is left unchanged.

For instance, it can be entertaining to see a single logic-IC being used instead of many transistors. Using other logic-families (e.g. TTL, CMOS) becomes possible as well.

In this chapter...

(The order of subsections is more or less arbitrary - each subsection discusses an individual module. See the chapter on architecture to read more about interaction between modules.)

Although not part of the CPU itself, a RAM- & ROM-interface module, or "bridge", also exists.

This module listens on the CPU's address- and data-bus for activity, and communicates relevant data to the outside world on-the-fly, e.g. to a host-PC or mass-storage device. This module also serves as debugging-interface, and generates the CPU's clock- and reset-signals.

The RAM- & ROM-interface is not discussed here.